Coral NPU is Google’s open, RISC-V-based neural processing unit aimed at always-on, ultra-low-power edge AI — AR glasses, wearables, rings, toys, smart-home sensors — where battery and thermal budgets kill most “edge LLM” marketing slides. On Oct 20, 2026, Google Research said the 32-bit architecture is complete (Milestones 1–4), including the new Matrix Execution Unit, configurable for up to about 1 TOPS, with an average inference power target around 10 mW. Those numbers are Google / partner claims, not independent lab audits.
The same day, Google open-sourced Coral Compiler v1.0 — an end-to-end MLIR / IREE path so JAX, PyTorch, TensorFlow, and LiteRT-style models can compile toward Coral NPU (via StableHLO / TOSA and progressive lowerings), with host-CPU fallback for unsupported ops and simulators (MPACT, Verilator) for pre-silicon work. Docs live at developers.google.com/coral; the compiler repo is on GitHub under the google-coral org.
What VeriSilicon actually sells
Open RTL on GitHub is not the same as a tapeout-ready IP drop. VeriSilicon’s pitch — echoed in eetrend coverage and its own Coral NPU materials — is the commercialization bridge: about four years of co-design and verification with Google Research, then product-grade IP hardening plus one-stop custom silicon for customers who want Coral inside an SoC for glasses, rings, toys, or smart-home silicon.
Context for why that story lands: VeriSilicon says its own NPU track record covers 91 customers, 140+ AI chips, and roughly 250 million AI chips shipped. Treat that as a vendor claim about engineering bandwidth, not a Coral-specific shipment number.
Illustration: model → MLIR/IREE → Coral binary, plus the open-evaluate vs productized-IP fork VeriSilicon is selling.
Can you use it from outside China?
Open track: architecture docs, 32-bit RTL (including the matrix unit), Coral Compiler v1.0, and simulators are meant for global use via Google’s Coral developer site and GitHub — evaluate, simulate, and experiment without buying Chinese IP. Product track: VeriSilicon sells enterprise-grade Coral NPU IP and design services; that is a commercial license conversation, not a clone of the public repo. Separately, Synaptics already ships production silicon implementing Coral — the Torq NPU on the Astra SL line (product briefs cite SL2610; Oct 20 materials highlight Coralboard SL / SL2619 at about 1 TOPS) with IREE/MLIR tooling — so you can buy boards and chips without going through VeriSilicon at all.
What actually changes
For hardware PMs and ML engineers tired of proprietary NPU SDKs, the interesting shift is architectural and social:
- Open RISC-V always-on NPU — scalar + RVV vector + matrix MAC as a coherent target, not a black-box accelerator bolted beside a CPU.
- Unified MLIR/IREE path — one compiler story across frameworks instead of rewriting kernels per vendor toolchain.
- Commercial silicon already exists — Synaptics Torq / Coralboard shows the open design is not paper-only; VeriSilicon’s role is scaling more SoC integrators in China and abroad via IP + turnkey design.
Power and peak-TOPS figures remain claims until you measure your model on your silicon. Unsupported layers still fall back to the host CPU — which is honest, but it also means “compiled to Coral” is not automatic efficiency.
Where to look
- Docs: developers.google.com/coral
- Google Research / Developers Blog (Oct 20, 2026): Coral NPU full-stack / unifying Edge AI milestones
- Compiler: github.com/google-coral/coralnpu-compiler
- VeriSilicon: Coral NPU press / IP portfolio pages
- Chinese coverage (Oct 22): eetrend / 电子创新网 — VeriSilicon commercialization angle
Honest caveats
- ~1 TOPS / ~10 mW — Google Research / partner targets; measure your workload.
- Open IP ≠ free commercial silicon — public RTL for evaluation; VeriSilicon and Synaptics are the productized routes.
- Vendor shipment stats — VeriSilicon’s 91 / 140+ / ~250M figures describe its broader NPU business, not Coral volume.
- Host fallback — incomplete operator coverage can erase the milliwatt story on real models.
For overseas engineers building always-on wearables or IoT vision/audio, Coral’s dual milestone is less “another Chinese NPU” and more “an open RISC-V + MLIR target with a Chinese IP house ready to harden it — and at least one Western vendor already shipping silicon.”